Impact of VCO and PLL Phase Noise on Distributed Beamforming Arrays With Periodic Synchronization

A PLL Exploiting Sub-Sampling of the VCO Output to Reduce In-band Phase Noise

In this paper, we present a 2.2-GHz low jitter PLL based on sub-sampling. It uses a phasedetector/charge-pump (PD/CP) that sub-samples the VCO output with the reference clock. In contrast to what happens in a classical PLL, the PD/CP noise is not multiplied by N in this sub-sampling PLL. Moreover, no frequency divider is needed in the locked state and hence divider noise and power can be elimin...

PLL Random Jitter Estimation Using Different VCO Phase Noise Simulation Methodologies

Random jitter (RJ) is a significant noise component in PLL systems that use ring-based oscillators. In order to estimate RJ, accurate modeling of the VCO phase noise is essential. In this paper, the authors will present how the VCO phase noise they obtained from HSPICE RF and from the Impulse-Sensitivity Function (ISF) method compared to lab measurements, the limitations of the two methods and ...

Distributed Phased Arrays and Wireless Beamforming Networks

A Wideband Low-Phase-Noise CMOS VCO

A CMOS VCO has been designed and fabricated in a commercial 0.25 m CMOS process. Using a combination of switched binary-weighted capacitors and standard varactors, this VCO achieves a 28% tuning range with a control voltage ranging from 0-2 V, while maintaining a tuning sensitivity of less than 75 MHz/V over its entire frequency range. Compact choke inductors are used in place of resistors to p...

Low-phase-noise Cmos Vco with Harmonically Tuned Lc Tank

A low-phase-noise voltage-controlled oscillator (VCO) has been demonstrated using a harmonically tuned LC resonance tank. In this circuit configuration, the voltage shape at the differential cell is almost rectangular; thus, the cell is switched effectively and the phase noise is reduced. More importantly, the proposed tank suppresses downconversion of the noise around 2f0 to the phase noise, d...